The number of conflict misses experienced by the cache

Consider a 2−way set associative cache with 256 blocks and uses LRU replacement. Initially the cache is empty. Conflict misses are those misses which occur due to the contention of multiple blocks for the same cache set. Compulsory misses occur due to first time access to the block. The following sequence of access to memory blocks :

      {0,128,256,128,0,128,256,128,1,129,257,129,1,129,257,129}

is repeated 10 times. The number of conflict misses experienced by the cache is _________ .

5Comments
shivani @shivani1234
8 May 2017 05:07 pm
  • i am giving you method try it yourself, else i will tell in detail
  • i think u must be having confusion in conflict miss 
shivani @shivani1234
4 May 2017 08:36 pm
  • for 1st iteration 0,128,256,1,257,129 will be compulsary miss , there will be 4 conflict miss
  • for other 9 iteration there will be 8 miss
  • so, 4+9*8=76.
  • ping me ,if you don't get concept.
shweta @shweta1920
6 May 2017 05:16 pm

@shivani1234 ... I'm not getting the whole question.. and ..also the pic u uploaded is not clear pls increase the size of pic

Sumit Verma @sumitkgp
5 May 2017 01:57 am

@shivani1234 plz edit the image size in the previous comment. It is not visible well.

shivani @shivani1234
8 May 2017 05:26 pm